mirror of
https://github.com/lwvmobile/dsd-fme.git
synced 2026-11-14 09:47:30 -05:00
DMR Reorganization; Initial Trunking Support;
This commit is contained in:
lwvmobile
396
src/dmr_data.c
396
src/dmr_data.c
@@ -18,35 +18,32 @@
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#include "dsd.h"
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void
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processDMRdata (dsd_opts * opts, dsd_state * state)
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dmr_data_sync (dsd_opts * opts, dsd_state * state)
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{
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int i, dibit;
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int *dibit_p;
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char sync[25];
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char syncdata[48];
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char cachdata[25] = {0};
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char cc[5] = {0};
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char ccAscii[5] = {0};
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char bursttype[5];
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unsigned int burst;
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char info[196];
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char cachdata[25];
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char bursttype[5];
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uint8_t burst;
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char info[196];
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unsigned char SlotType[20];
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unsigned int SlotTypeOk;
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int cachInterleave[24] = {0, 7, 8, 9, 1, 10, 11, 12, 2, 13, 14, 15, 3, 16, 4, 17, 18, 19, 5, 20, 21, 22, 6, 23};
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uint8_t cach_err = 0;
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#ifdef DMR_DUMP
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char syncbits[49];
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char cachbits[25];
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int k;
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#endif
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ccAscii[4] = 0;
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bursttype[4] = 0;
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int cachInterleave[24] =
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{0, 7, 8, 9, 1, 10,
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11, 12, 2, 13, 14,
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15, 3, 16, 4, 17, 18,
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19, 5, 20, 21, 22, 6, 23
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};
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dibit_p = state->dmr_payload_p - 90;
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// CACH
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//collect cach and de-interleave
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for (i = 0; i < 12; i++)
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{
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dibit = *dibit_p;
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@@ -65,67 +62,34 @@ processDMRdata (dsd_opts * opts, dsd_state * state)
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}
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//decode and correct cach and compare
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int cach_okay = 69;
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if ( Hamming_7_4_decode (cachdata) ) //is now de-interleaved appropriately
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//seperate tact bits from cach
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uint8_t tact_bits[7];
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for (i = 0; i < 7; i++)
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{
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cach_okay = 1;
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tact_bits[i] = cachdata[i];
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}
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if (cach_okay == 1)
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//run hamming on tact bits
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int cach_okay = -1;
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if ( Hamming_7_4_decode (tact_bits) ) cach_okay = 1;
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else
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{
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//fprintf (stderr, "CACH Okay ");
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}
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if (cach_okay != 1)
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{
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//fprintf (stderr, "CACH FEC Error %d", cach_okay);
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if (opts->aggressive_framesync == 1) //may not worry about it on data
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cach_okay = -1;
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if (opts->aggressive_framesync == 2)
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{
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SlotTypeOk = 0;
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goto END;
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}
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}
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state->currentslot = cachdata[1];
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state->currentslot = tact_bits[1];
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//minor bugfix for MSData when MSData has accumulated data blocks
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//(i.e. data header and 1/2 rate data), force all data into slot 0
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//in the future, maybe we will remove the hard set on this
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if (state->dmr_ms_mode == 1)
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{
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state->currentslot = 0;
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}
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if (state->currentslot == 0 && state->dmr_ms_mode == 0)
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{
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state->slot1light[0] = '[';
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state->slot1light[6] = ']';
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state->slot2light[0] = ' ';
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state->slot2light[6] = ' ';
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}
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//else
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if (state->currentslot == 1 && state->dmr_ms_mode == 0)
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{
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state->slot2light[0] = '[';
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state->slot2light[6] = ']';
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state->slot1light[0] = ' ';
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state->slot1light[6] = ' ';
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}
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//end correct cach and set slot
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#ifdef DMR_DUMP
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k = 0;
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for (i = 0; i < 12; i++)
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{
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dibit = cachdata[i];
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cachbits[k] = (1 & (dibit >> 1)) + 48; // bit 1
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k++;
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cachbits[k] = (1 & dibit) + 48; // bit 0
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k++;
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}
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cachbits[24] = 0;
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fprintf(stderr, "%s ", cachbits);
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#endif
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//trellis bits
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unsigned char trellisdibits[98];
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// Current slot - First half - Data Payload - 1st part
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for (i = 0; i < 49; i++)
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{
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@@ -139,7 +103,6 @@ processDMRdata (dsd_opts * opts, dsd_state * state)
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{
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dibit = (int)state->dmr_stereo_payload[i+12];
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}
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trellisdibits[i] = dibit;
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info[2*i] = (1 & (dibit >> 1)); // bit 1
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info[(2*i)+1] = (1 & dibit); // bit 0
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}
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@@ -153,10 +116,9 @@ processDMRdata (dsd_opts * opts, dsd_state * state)
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}
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if (state->dmr_stereo == 1)
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{
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dibit = (int)state->dmr_stereo_payload[61]; //61, not i+61
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dibit = (int)state->dmr_stereo_payload[61];
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}
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cc[0] = (1 & (dibit >> 1)); // bit 1
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cc[1] = (1 & dibit); // bit 0
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SlotType[0] = (1 & (dibit >> 1)); // bit 1
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SlotType[1] = (1 & dibit); // bit 0
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@@ -170,17 +132,10 @@ processDMRdata (dsd_opts * opts, dsd_state * state)
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{
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dibit = (int)state->dmr_stereo_payload[62];
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}
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cc[2] = (1 & (dibit >> 1)); // bit 1
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cc[3] = (1 & dibit); // bit 0
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SlotType[2] = (1 & (dibit >> 1)); // bit 1
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SlotType[3] = (1 & dibit); // bit 0
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ccAscii[0] = cc[0] + '0';
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ccAscii[1] = cc[1] + '0';
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ccAscii[2] = cc[2] + '0';
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ccAscii[3] = cc[3] + '0';
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ccAscii[4] = cc[4] + '\0';
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dibit = *dibit_p;
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dibit_p++;
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if (opts->inverted_dmr == 1)
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@@ -189,7 +144,7 @@ processDMRdata (dsd_opts * opts, dsd_state * state)
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}
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if (state->dmr_stereo == 1) //state
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{
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dibit = (int)state->dmr_stereo_payload[63]; //(int)
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dibit = (int)state->dmr_stereo_payload[63];
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}
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SlotType[4] = (1 & (dibit >> 1)); // bit 1
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@@ -203,7 +158,7 @@ processDMRdata (dsd_opts * opts, dsd_state * state)
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}
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if (state->dmr_stereo == 1) //state
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{
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dibit = (int)state->dmr_stereo_payload[64]; //(int)
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dibit = (int)state->dmr_stereo_payload[64];
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}
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SlotType[6] = (1 & (dibit >> 1)); // bit 1
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@@ -223,7 +178,7 @@ processDMRdata (dsd_opts * opts, dsd_state * state)
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SlotType[8] = (1 & (dibit >> 1)); // bit 1
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SlotType[9] = (1 & dibit); // bit 0
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// signalling data or sync
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// signaling data or sync
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for (i = 0; i < 24; i++)
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{
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dibit = *dibit_p;
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@@ -239,32 +194,19 @@ processDMRdata (dsd_opts * opts, dsd_state * state)
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syncdata[2*i] = (1 & (dibit >> 1)); // bit 1
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syncdata[(2*i)+1] = (1 & dibit); // bit 0
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sync[i] = (dibit | 1) + 48;
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}
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sync[24] = 0;
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#ifdef DMR_DUMP
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k = 0;
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for (i = 0; i < 24; i++)
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{
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syncbits[k] = syncdata[(k*2)] + 48; // bit 1
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k++;
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syncbits[k] = syncdata[(k*2)+1] + 48; // bit 0
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k++;
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}
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syncbits[48] = 0;
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fprintf(stderr, "%s ", syncbits);
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#endif
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if((strcmp (sync, DMR_BS_DATA_SYNC) == 0) )//|| (strcmp (sync, DMR_MS_DATA_SYNC) == 0))
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if((strcmp (sync, DMR_BS_DATA_SYNC) == 0) )
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{
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if (state->currentslot == 0)
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{
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sprintf(state->slot1light, "[slot1]");
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sprintf(state->slot2light, " slot2 ");
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}
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else
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{
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sprintf(state->slot1light, " slot1 ");
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sprintf(state->slot2light, "[slot2]");
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}
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}
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@@ -273,15 +215,17 @@ processDMRdata (dsd_opts * opts, dsd_state * state)
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{
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state->currentslot = 0;
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sprintf(state->slot1light, "[sLoT1]");
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sprintf(state->slot2light, "[DMODE]");
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}
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else if(strcmp (sync, DMR_DIRECT_MODE_TS2_DATA_SYNC) == 0)
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{
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state->currentslot = 1;
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sprintf(state->slot1light, "[DMODE]");
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sprintf(state->slot2light, "[sLoT2]");
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}
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if (opts->errorbars == 1 && state->dmr_ms_mode == 0)
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if (state->dmr_ms_mode == 0)
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{
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fprintf(stderr, "%s %s ", state->slot1light, state->slot2light);
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}
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@@ -289,283 +233,85 @@ processDMRdata (dsd_opts * opts, dsd_state * state)
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// Slot type - Second part - Parity bit
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for (i = 0; i < 5; i++)
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{
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if (state->dmr_stereo == 0) //only get dibits if not using dmr_stereo method
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if (state->dmr_stereo == 0)
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{
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dibit = getDibit(opts, state);
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}
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if (opts->inverted_dmr == 1)
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{
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//dibit = (dibit ^ 2);
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}
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if (state->dmr_stereo == 1)
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{
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dibit = (int)state->dmr_stereo_payload[i+90]; //double checked these i+ values make sure we are on the right ones
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dibit = (int)state->dmr_stereo_payload[i+90];
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}
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SlotType[(i*2) + 10] = (1 & (dibit >> 1)); // bit 1
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SlotType[(i*2) + 11] = (1 & dibit); // bit 0
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}
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/* Check and correct the SlotType (apply Golay(20,8) FEC check) */
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// golay (20,8) hamming-weight of 6 reliably corrects at most 2 bit-errors
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if( Golay_20_8_decode(SlotType) )
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{
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SlotTypeOk = 1;
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//fprintf (stderr, "Slot Okay ");
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}
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if( Golay_20_8_decode(SlotType) ) SlotTypeOk = 1;
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else
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{
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SlotTypeOk = -1;
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if (opts->aggressive_framesync == 1)
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{
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SlotTypeOk = 0;
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goto END;
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}
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}
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/* Slot Type parity checked => Fill the color code */
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state->color_code = (SlotType[0] << 3) + (SlotType[1] << 2) +(SlotType[2] << 1) + (SlotType[3] << 0);
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state->color_code_ok = SlotTypeOk;
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/* Reconstitute the burst type */
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//consider assigning this only when slottypeok or similar check passes, eliminate bad burst types from decoding randomly
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burst = (unsigned int)((SlotType[4] << 3) + (SlotType[5] << 2) + (SlotType[6] << 1) + SlotType[7]);
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if (state->currentslot == 0)
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{
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state->dmrburstL = burst;
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}
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if (state->currentslot == 1)
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{
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state->dmrburstR = burst;
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}
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//not sure why I still have two variables for this, need to look and see what state->color_code still ties into
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if (SlotTypeOk == 1) state->dmr_color_code = state->color_code;
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/* Reconstitute the burst type */
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bursttype[0] = SlotType[4] + '0';
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bursttype[1] = SlotType[5] + '0';
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bursttype[2] = SlotType[6] + '0';
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bursttype[3] = SlotType[7] + '0';
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bursttype[4] = '\0';
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burst = (uint8_t)((SlotType[4] << 3) + (SlotType[5] << 2) + (SlotType[6] << 1) + SlotType[7]);
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if (state->currentslot == 0) state->dmrburstL = burst;
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if (state->currentslot == 1) state->dmrburstR = burst;
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if (strcmp (bursttype, "0000") == 0)
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{
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sprintf(state->fsubtype, " PI Header ");
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}
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else if (strcmp (bursttype, "0001") == 0)
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{
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sprintf(state->fsubtype, " VOICE LC ");
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}
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else if (strcmp (bursttype, "0010") == 0)
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{
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sprintf(state->fsubtype, " TLC ");
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}
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else if (strcmp (bursttype, "0011") == 0)
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{
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sprintf(state->fsubtype, " CSBK ");
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}
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else if (strcmp (bursttype, "0100") == 0)
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{
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sprintf(state->fsubtype, " MBC Header ");
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}
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else if (strcmp (bursttype, "0101") == 0)
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{
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sprintf(state->fsubtype, " MBC ");
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}
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else if (strcmp (bursttype, "0110") == 0)
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{
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sprintf(state->fsubtype, " DATA Header ");
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}
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else if (strcmp (bursttype, "0111") == 0)
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{
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sprintf(state->fsubtype, " RATE 1/2 DATA");
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}
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else if (strcmp (bursttype, "1000") == 0)
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{
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sprintf(state->fsubtype, " RATE 3/4 DATA");
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}
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else if (strcmp (bursttype, "1001") == 0)
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{
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sprintf(state->fsubtype, " Slot idle ");
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}
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else if (strcmp (bursttype, "1010") == 0)
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{
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sprintf(state->fsubtype, " Rate 1 DATA ");
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}
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else
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{
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sprintf(state->fsubtype, " ");
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}
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// Current slot - First half - Data Payload - 1st part
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//trellis
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// Current slot - Second Half - Data Payload - 2nd part
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for (i = 0; i < 49; i++)
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{
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if (state->dmr_stereo == 0) //only get dibits if not using dmr_stereo method
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if (state->dmr_stereo == 0)
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{
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dibit = getDibit(opts, state);
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}
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if (opts->inverted_dmr == 1)
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{
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//dibit = (dibit ^ 2);
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}
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if (state->dmr_stereo == 1)
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{
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dibit = (int)state->dmr_stereo_payload[i+95]; //double checked these i+ values make sure we are on the right ones
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dibit = (int)state->dmr_stereo_payload[i+95];
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}
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trellisdibits[i+49] = dibit;
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info[(2*i) + 98] = (1 & (dibit >> 1)); // bit 1
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info[(2*i) + 99] = (1 & dibit); // bit 0
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}
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dmr_data_burst_handler(opts, state, (uint8_t *)info, burst);
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// Skip cach (24 bit = 12 dibit) and next slot 1st half (98 + 10 bit = 49 + 5 dibit)
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if (state->dmr_stereo == 0)
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//don't run cach on simplex or mono
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if (state->dmr_ms_mode == 0 || opts->dmr_mono == 0)
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{
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skipDibit (opts, state, 12 + 49 + 5);
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}
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cach_err = dmr_cach (opts, state, cachdata);
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||||
}
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||||
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||||
if (opts->errorbars == 1)
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||||
{
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||||
/* Print the color code */
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//if (burst == 0b1001 && state->color_code_ok) //only print on idle for data types, otherwise prints on voice frames.
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if (SlotTypeOk == 1)
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{
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fprintf (stderr, "%s", KCYN);
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fprintf(stderr, "| Color Code=%02d ", (int)state->color_code);
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fprintf (stderr, "%s", KNRM);
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//state->dmr_color_code = state->color_code;
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}
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else fprintf(stderr, "| ");
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//ending line break
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fprintf(stderr, "\n");
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//if(state->color_code_ok) fprintf(stderr, "(OK) |");
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if(state->color_code_ok) fprintf(stderr, "| (CRC OK ) |"); //add line break
|
||||
else
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||||
{
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fprintf (stderr, "%s", KRED);
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||||
fprintf(stderr, "| (CRC ERR) |");
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||||
fprintf (stderr, "%s", KNRM);
|
||||
}
|
||||
//fprintf (stderr, "\n"); //print line break
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||||
if (strcmp (state->fsubtype, " ") == 0)
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||||
{
|
||||
//fprintf(stderr, " Unknown burst type: %s", bursttype);
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||||
fprintf(stderr, " Unknown");
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||||
}
|
||||
else
|
||||
{
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||||
fprintf(stderr, "%s", state->fsubtype);
|
||||
}
|
||||
}
|
||||
|
||||
switch(burst)
|
||||
{
|
||||
/* Burst = PI header */
|
||||
case 0b0000:
|
||||
{
|
||||
ProcessDmrPIHeader(opts, state, (uint8_t *)info, (uint8_t *)syncdata, (uint8_t *)SlotType);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Burst = Voice LC header */
|
||||
case 0b0001:
|
||||
{
|
||||
/* Extract data from Voice LC Header */
|
||||
ProcessDmrVoiceLcHeader(opts, state, (uint8_t *)info, (uint8_t *)syncdata, (uint8_t *)SlotType);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Burst = TLC */
|
||||
case 0b0010:
|
||||
{
|
||||
//Not sure if I really care about this in the context of what it shows
|
||||
ProcessDmrTerminaisonLC(opts, state, (uint8_t *)info, (uint8_t *)syncdata, (uint8_t *)SlotType);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Burst = CSBK */
|
||||
case 0b0011:
|
||||
{
|
||||
//going to disable until I can find more useful info to present
|
||||
ProcessCSBK(opts, state, (uint8_t *)info, (uint8_t *)syncdata, (uint8_t *)SlotType);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Burst = MBC Header */
|
||||
case 0b0100:
|
||||
{
|
||||
ProcessMBChData(opts, state, (uint8_t *)info, (uint8_t *)syncdata, (uint8_t *)SlotType);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Burst = MBC Continuation*/
|
||||
case 0b0101:
|
||||
{
|
||||
ProcessMBCData(opts, state, (uint8_t *)info, (uint8_t *)syncdata, (uint8_t *)SlotType);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Burst = DATA Header */
|
||||
case 0b0110:
|
||||
{
|
||||
ProcessDataData(opts, state, (uint8_t *)info, (uint8_t *)syncdata, (uint8_t *)SlotType);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Burst = RATE 1/2 DATA */
|
||||
case 0b0111:
|
||||
{
|
||||
Process12Data(opts, state, (uint8_t *)info, (uint8_t *)syncdata, (uint8_t *)SlotType);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Burst = RATE 3/4 DATA */
|
||||
case 0b1000:
|
||||
{
|
||||
//need to keep working on improving the trellis decode, but is partially viable now
|
||||
Process34Data(opts, state, trellisdibits, (uint8_t *)syncdata, (uint8_t *)SlotType);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Burst = Slot idle */
|
||||
case 0b1001:
|
||||
{
|
||||
if(state->color_code_ok && state->dmr_stereo == 0) state->dmr_color_code = state->color_code; //try setting this on idle if crc ok
|
||||
break;
|
||||
}
|
||||
|
||||
/* Burst = Rate 1 DATA */
|
||||
case 0b1010:
|
||||
{
|
||||
Process1Data(opts, state, (uint8_t *)info, (uint8_t *)syncdata, (uint8_t *)SlotType);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Burst = Unified Single Block DATA */
|
||||
case 0b1101:
|
||||
{
|
||||
ProcessUnifiedData(opts, state, (uint8_t *)info, (uint8_t *)syncdata, (uint8_t *)SlotType);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Default */
|
||||
default:
|
||||
{
|
||||
/* Nothing to do */
|
||||
ProcessReservedData(opts, state, (uint8_t *)info, (uint8_t *)syncdata, (uint8_t *)SlotType);
|
||||
break;
|
||||
}
|
||||
} /* End switch(burst) */
|
||||
|
||||
if (opts->errorbars == 1)
|
||||
{
|
||||
fprintf(stderr, "\n");
|
||||
}
|
||||
END:
|
||||
if (SlotTypeOk == 0 || cach_okay != 1)
|
||||
{
|
||||
fprintf (stderr, "%s", KRED);
|
||||
fprintf (stderr, "| ** CACH or Burst Type FEC ERR ** ");
|
||||
fprintf (stderr, "| CACH/Burst FEC ERR");
|
||||
fprintf (stderr, "%s", KNRM);
|
||||
fprintf (stderr, "\n");
|
||||
}
|
||||
|
||||
} /* End processDMRdata() */
|
||||
// Skip cach (24 bit = 12 dibit) and next slot 1st half (98 + 10 bit = 49 + 5 dibit)
|
||||
if (state->dmr_stereo == 0)
|
||||
{
|
||||
skipDibit (opts, state, 12 + 49 + 5);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user