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DMR increase BF and block storage; R1 Pad Bit Fix;

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lwvmobile
2023-08-19 10:04:09 -04:00
parent 3686e7fdd2
commit 0097942732
3 changed files with 13 additions and 18 deletions
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2
include/dsd.h
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@@ -599,7 +599,7 @@ typedef struct
//new stuff below here
uint8_t data_conf_data[2]; //flag for confirmed data blocks per slot
uint8_t dmr_pdu_sf[2][288]; //unified pdu 'superframe' //[slot][byte]
uint8_t dmr_pdu_sf[2][24*128]; //unified pdu 'superframe' //[slot][byte] -- increased capacity to 127(+1) full rate blocks
uint8_t cap_plus_csbk_bits[2][12*8*8]; //CSBK Cap+ FL initial and appended block bit storage, by slot
uint8_t cap_plus_block_num[2]; //received block number storage -- per timeslot
uint8_t data_block_crc_valid[2][25]; //flag each individual block as good crc on confirmed data

15
src/dmr_block.c
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@@ -16,7 +16,7 @@ void dmr_dheader (dsd_opts * opts, dsd_state * state, uint8_t dheader[], uint8_t
uint8_t slot = state->currentslot;
//clear out unified pdu 'superframe' slot
for (short int i = 0; i < 288; i++) state->dmr_pdu_sf[slot][i] = 0;
for (int i = 0; i < 24*127; i++) state->dmr_pdu_sf[slot][i] = 0;
//reset block counter to 1
state->data_block_counter[slot] = 1;
@@ -320,7 +320,7 @@ void dmr_dheader (dsd_opts * opts, dsd_state * state, uint8_t dheader[], uint8_t
}
//block storage sanity
if (state->data_header_blocks[slot] > 9) state->data_header_blocks[slot] = 9;
if (state->data_header_blocks[slot] > 127) state->data_header_blocks[slot] = 127;
//assuming we didn't receive the initial data header block on a p_head and then decremented it
//3 or 4 seems to be the average safe value
if (state->data_header_blocks[slot] < 1) state->data_header_blocks[slot] = 4;
@@ -442,7 +442,7 @@ void dmr_block_assembler (dsd_opts * opts, dsd_state * state, uint8_t block_byte
//sanity check, setting block_len and block values to sane numbers in case of missing header, else could overload array (crash) or print out
if (blocks < 1) blocks = 1; //changed blocks from uint8_t to int
if (blocks > 9) blocks = 9;
if (blocks > 127) blocks = 127;
if (block_len == 0) block_len = 18;
if (block_len > 24) block_len = 24;
@@ -549,11 +549,8 @@ void dmr_block_assembler (dsd_opts * opts, dsd_state * state, uint8_t block_byte
fprintf (stderr, "\n Slot %d - Multi Block PDU Message\n ", slot+1);
for (i = 0; i < ((blocks+1)*block_len); i++)
{
if ( (i != 0) && (i % 12 == 0) ) fprintf (stderr, "\n ");
fprintf (stderr, "[%02X]", state->dmr_pdu_sf[slot][i]);
if (i == 11 || i == 23 || i == 35 || i == 47 || i == 59 || i == 71 || i == 83 || i == 95)
{
fprintf (stderr, "\n ");
}
}
//debug print
@@ -719,7 +716,7 @@ void dmr_block_assembler (dsd_opts * opts, dsd_state * state, uint8_t block_byte
{
//clear out unified pdu 'superframe' slot
for (short int i = 0; i < 288; i++)
for (int i = 0; i < 24*127; i++)
{
state->dmr_pdu_sf[slot][i] = 0;
}
@@ -742,7 +739,7 @@ void dmr_block_assembler (dsd_opts * opts, dsd_state * state, uint8_t block_byte
{
//clear out unified pdu 'superframe' slot
for (short int i = 0; i < 288; i++)
for (int i = 0; i < 24*127; i++)
{
state->dmr_pdu_sf[slot][i] = 0;
}

14
src/dmr_dburst.c
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@@ -497,20 +497,18 @@ void dmr_data_burst_handler(dsd_opts * opts, dsd_state * state, uint8_t info[196
}
if (is_full) //Rate 1 Data -- todo: fix padding bits, the four padding bits are on bit 96,97,98,99
if (is_full) //Rate 1 Data
{
CRCExtracted = 0;
CRCComputed = 0;
IrrecoverableErrors = 0; //implicit, since there is no encoding
for (i = 0; i < 24; i++)
{
for (i = 0; i < 12; i++)
DMR_PDU[i] = (uint8_t)ConvertBitIntoBytes(&info[i*8], 8);
}
//leftover 4 bits, manual doesn't say which 4 so assuming last 4
//pushing last 4 to 25 and shifting it
DMR_PDU[25] = (uint8_t)ConvertBitIntoBytes(&info[192], 4);
DMR_PDU[25] = DMR_PDU[25] << 4;
//Skip Padding Bits (96,97,98,99)
for (i = 0; i < 12; i++)
DMR_PDU[i+12] = (uint8_t)ConvertBitIntoBytes(&info[(i*8)+100], 8);
//set CRC to correct on unconfirmed 1 rate data blocks (for reporting due to no CRC available on these)
if (state->data_conf_data[slot] == 0) CRCCorrect = 1;