DMR: Reconfigure dmr_le;

Reconfigure dmr_le so that it can be completely disabled for Hytera Enhanced, or Late Entry MI only for DMRA, or Late Entry MI and Key/Alg for DMRA;

Misc Hytera Enhanced Setup Tweaks;
This commit is contained in:
lwvmobile
2025-03-26 00:54:08 -04:00
parent 88c76c4a6c
commit 4b75211ad0
5 changed files with 28 additions and 14 deletions

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@@ -530,7 +530,8 @@ void dmrBS (dsd_opts * opts, dsd_state * state)
if (internalslot == 0 && vc1 == 6) dmr_alg_refresh (opts, state);
if (internalslot == 1 && vc2 == 6) dmr_alg_refresh (opts, state);
dmr_late_entry_mi_fragment (opts, state, vc%7, m1, m2, m3);
if (opts->dmr_le != 2) //if not Hytera Enhanced
dmr_late_entry_mi_fragment (opts, state, vc%7, m1, m2, m3);
//increment the vc counters
if (internalslot == 0) vc1++;
@@ -922,7 +923,8 @@ void dmrBSBootstrap (dsd_opts * opts, dsd_state * state)
}
//collect the mi fragment
dmr_late_entry_mi_fragment (opts, state, 1, m1, m2, m3);
if (opts->dmr_le != 2) //if not Hytera Enhanced
dmr_late_entry_mi_fragment (opts, state, 1, m1, m2, m3);
cach_err = dmr_cach (opts, state, cachdata);
if (opts->payload == 0) fprintf (stderr, "\n");

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@@ -327,18 +327,16 @@ void dmr_flco (dsd_opts * opts, dsd_state * state, uint8_t lc_bits[], uint32_t C
state->payload_algid = alg;
state->payload_keyid = key;
state->payload_mi = mi;
// hytera_enhanced_enc_setup(opts, state, state->R, state->payload_mi); //need to redo part of this (no key loader yet)
}
else
{
state->payload_algidR = alg;
state->payload_keyidR = key;
state->payload_miR = mi;
// hytera_enhanced_enc_setup(opts, state, state->RR, state->payload_miR); //need to redo part of this (no key loader yet)
}
//disable late entry for DMRA (hopefully, there aren't any systems running both DMRA and Hytera Enhanced mixed together)
opts->dmr_le = 0;
opts->dmr_le = 2;
*IrrecoverableErrors = 0; //only set if checksum passes
}

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@@ -221,7 +221,14 @@ void dmr_alg_refresh (dsd_opts * opts, dsd_state * state)
LFSR (state);
fprintf (stderr, "\n");
}
//LFSR64 carried out after LE verification in order to keep it from constantly resetting the MI to the previous value
//LFSR64/128 carried out after LE verification in order to keep it from constantly resetting the MI to the previous value
if (state->payload_algid == 0x02)
{
state->DMRvcL = 0;
//LFSR MI propegation function
}
}
if (state->currentslot == 1)
@@ -238,7 +245,14 @@ void dmr_alg_refresh (dsd_opts * opts, dsd_state * state)
LFSR (state);
fprintf (stderr, "\n");
}
//LFSR64 carried out after LE verification in order to keep it from constantly resetting the MI to the previous value
//LFSR64/128 carried out after LE verification in order to keep it from constantly resetting the MI to the previous value
if (state->payload_algidR == 0x02)
{
state->DMRvcR = 0;
//LFSR MI propegation function
}
}
@@ -444,7 +458,7 @@ void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power)
fprintf (stderr, "\n");
fprintf (stderr, "%s", KCYN);
fprintf (stderr, " Slot 1");
fprintf (stderr, " DMR LE SB ALG ID: 0x%02X KEY ID: 0x%02X", alg + 0x20, key);
fprintf (stderr, " DMR LE SB ALG ID: %02X; KEY ID: %02X;", alg + 0x20, key);
fprintf (stderr, "%s ", KNRM);
if (opts->payload == 1) fprintf (stderr, "\n");
if (state->payload_keyid != key)
@@ -466,7 +480,7 @@ void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power)
fprintf (stderr, "\n");
fprintf (stderr, "%s", KCYN);
fprintf (stderr, " Slot 2");
fprintf (stderr, " DMR LE SB ALG ID: 0x%02X KEY ID: 0x%02X", alg + 0x20, key);
fprintf (stderr, " DMR LE SB ALG ID: %02X; KEY ID: %02X;", alg + 0x20, key);
fprintf (stderr, "%s ", KNRM);
if (opts->payload == 1) fprintf (stderr, "\n");
if (state->payload_keyidR != key)

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@@ -283,7 +283,8 @@ void dmrMS (dsd_opts * opts, dsd_state * state)
}
//collect the mi fragment
dmr_late_entry_mi_fragment (opts, state, vc, m1, m2, m3);
if (opts->dmr_le != 2) //if not Hytera Enhanced
dmr_late_entry_mi_fragment (opts, state, vc, m1, m2, m3);
//errors in ms/mono since we skip the other slot
// cach_err = dmr_cach (opts, state, cachdata);
@@ -556,7 +557,8 @@ void dmrMSBootstrap (dsd_opts * opts, dsd_state * state)
}
//collect the mi fragment
dmr_late_entry_mi_fragment (opts, state, 1, m1, m2, m3);
if (opts->dmr_le != 2) //if not Hytera Enhanced
dmr_late_entry_mi_fragment (opts, state, 1, m1, m2, m3);
//errors due to skipping other slot
// cach_err = dmr_cach (opts, state, cachdata);

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@@ -34,7 +34,6 @@ void dmr_pi (dsd_opts * opts, dsd_state * state, uint8_t PI_BYTE[], uint32_t CRC
state->payload_keyid = PI_BYTE[2];
state->payload_mi = ((unsigned long long int)PI_BYTE[3] << 32ULL) | ((unsigned long long int)PI_BYTE[4] << 24) |
((unsigned long long int)PI_BYTE[5] << 16) | ((unsigned long long int)PI_BYTE[6] << 8) | ((unsigned long long int)PI_BYTE[7] << 0);
hytera_enhanced_enc_setup(opts, state, state->R, state->payload_mi); //need to redo part of this (no key loader yet)
}
else
{
@@ -42,7 +41,6 @@ void dmr_pi (dsd_opts * opts, dsd_state * state, uint8_t PI_BYTE[], uint32_t CRC
state->payload_keyidR = PI_BYTE[2];
state->payload_miR = ((unsigned long long int)PI_BYTE[3] << 32ULL) | ((unsigned long long int)PI_BYTE[4] << 24) |
((unsigned long long int)PI_BYTE[5] << 16) | ((unsigned long long int)PI_BYTE[6] << 8) | ((unsigned long long int)PI_BYTE[7] << 0);
hytera_enhanced_enc_setup(opts, state, state->RR, state->payload_miR); //need to redo part of this (no key loader yet)
}
fprintf (stderr, "%s ", KYEL);
@@ -72,7 +70,7 @@ void dmr_pi (dsd_opts * opts, dsd_state * state, uint8_t PI_BYTE[], uint32_t CRC
fprintf (stderr, " AES-256;");
//disable late entry for DMRA (hopefully, there aren't any systems running both DMRA and Hytera Enhanced mixed together)
opts->dmr_le = 0;
opts->dmr_le = 2;
// fprintf (stderr, " (Checksum Okay);");
}